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Polynomial = X + X + X + 1
1-Wire CRC GENERATOR Figure 4
8 5 4
DS1921H/Z
1
2
3
4
5
6
7
8
st
STAGE
nd
STAGE
rd
STAGE
th
STAGE
th
STAGE
th
STAGE
th
STAGE
th
STAGE
X
0
X
1
X
2
X
3
X
4
X
5
X
6
X
7
X
8
INPUT DATA
MEMORY
The memory map of the DS1921H/Z is shown in Figure 5. The 4096-bit general-purpose SRAM make up
pages 0 through 15. The timekeeping, control, and counter registers fill page 16, called Register Page (see
Figure 6). Pages 17 to 19 are assigned to storing the alarm time stamps and durations. The temperature
histogram bins begin at page 64 and use up to four pages. The datalog memory covers pages 128 to 191.
Memory pages 20 to 63, 68 to 127, and 192 to 255 are reserved for future extensions. The scratchpad is
an additional page that acts as a buffer when writing to the SRAM or the register page. The memory
pages 17 and higher are read-only for the user. They are written to or erased solely under supervision of
the on-chip control logic.
DS1921H/Z MEMORY MAP Figure 5
32-Byte Intermediate Storage Scratchpad
ADDRESS
0000h to
01FFh
0200h to
021Fh
0220h to
027Fh
0280h to
07FFh
0800h to
087Fh
0880h to
0FFFh
1000h to
17FFh
1800h to
1FFFh
General-Purpose SRAM (16 Pages)
32-Byte Register Page
Alarm Time Stamps and Durations
(Reserved for Future Extensions)
Temperature Histogram Memory
(Reserved for Future Extensions)
Datalog Memory (64 Pages)
(Reserved for Future Extensions)
5 of 45
Pages 0 to 15
Page 16
Pages 17 to 19
Pages 20 to 63
Pages 64 to 67
Pages 68 to 127
Pages 128 to 191
Pages 192 to 255
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